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Xilinx Versal HBM Series with Integrated High Bandwidth Memory Tackles Big Data Compute Challenges in the Network and Cloud

Latest in Versal ACAP series delivers unmatched convergence of fast memory, secure connectivity, and adaptable compute in a single platform for data center and network operators

Xilinx, Inc. (NASDAQ: XLNX), the leader in adaptive computing, today introduced the Versal™ HBM adaptive compute acceleration platform (ACAP), the newest series in the Versal™ portfolio. The Versal HBM series enables the convergence of fast memory, secure connectivity, and adaptable compute in a single platform. Versal HBM ACAPs integrate the most advanced HBM2e DRAM, providing 820GB/s of throughput and 32GB of capacity for 8X more memory bandwidth and 63% lower power than DDR5 implementations.1 The Versal HBM series is architected to keep up with the higher memory needs of the most compute intensive, memory bound applications for data center, wired networking, test and measurement, and aerospace and defense.

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The Versal HBM series is the newest member of the Versal ACAP portfolio, delivering unmatched convergence of fast memory, secure connectivity, and adaptable compute in a single platform. (Graphic: Business Wire)

The Versal HBM series is the newest member of the Versal ACAP portfolio, delivering unmatched convergence of fast memory, secure connectivity, and adaptable compute in a single platform. (Graphic: Business Wire)

“Many real-time, high-performance applications are critically bottlenecked by memory bandwidth and operate at the edge of their power and thermal limits,” said Sumit Shah, senior director, Product Management and Marketing at Xilinx. “The Versal HBM series eliminates those bottlenecks to provide our customers with a solution that delivers significantly higher performance and reduced system power, latency, form factor, and total cost of ownership for data center and network operators.”

High bandwidth, secure connectivity

Built on the foundation of the Versal Premium series, Versal HBM devices incorporate power-optimized networking cores for high bandwidth, secure connectivity. The Versal HBM series offers 5.6Tb/s of serial bandwidth with 112Gb/s PAM4 transceivers, 2.4Tb/s of scalable Ethernet bandwidth, 1.2Tb/s of line rate encryption throughput, 600Gb/s of Interlaken connectivity, and 1.5Tb/s of PCIe® Gen5 bandwidth with built-in DMA, supporting both CCIX and CXL. This broad set of hardened IP provides off-the-shelf, multi-terabit networked connectivity for a breadth of protocols, data rates, and optical standards, enabling optimal power and performance and the fastest time to market.

Adaptable compute

As an adaptive, heterogeneous compute platform, the Versal HBM series is engineered to accelerate a wide range of workloads with large data sets, integrating adaptable engines for low-latency hardware parallelism, DSP engines for AI inference and signal processing, and scalar engines for embedded compute, platform management, and secure boot and configuration. Unlike fixed function accelerators, the Versal HBM series can dynamically reconfigure hardware in milliseconds to adapt with evolving algorithms and emerging protocols, eliminating the need for hardware redesign and re-deployment.

Transforming networks and data centers

This convergence of adaptable compute with high bandwidth memory and multi-terabit connectivity makes next-generation cloud acceleration and secure networking a reality. Versal HBM ACAPs deliver superior performance and power efficiency for big data workloads including fraud detection, recommendation engines, database acceleration, data analytics, financial modeling, and deep learning inference for natural language processing (NLP). By improving runtimes by orders of magnitude over modern server-class CPUs, while supporting 4X larger data sets,2 users can deploy applications with massive, connected data sets with far fewer and lower cost servers.

Similarly, Versal HBM ACAPs deliver network scalability and performance for 800G routers, switches, and security appliances. A traditional network processing unit (NPU) implementation of an 800G next-generation firewall would require multiple NPU devices and DDR modules, whereas a single Versal HBM ACAP eliminates external memories and performs packet processing, security processing, and adaptable AI-infused anomaly detection at dramatically lower power and at a fraction of the form factor. The series delivers major CapEx and OpEx savings for cloud and network providers by enabling customers to use fewer devices and systems to implement their applications.

Accessible to both hardware and software developers, Versal HBM ACAPs provide a design-entry point for any developer, including Vivado® Design Suite for hardware developers, the Vitis unified software platform for software developers, and Vitis AI for data scientists with domain-specific frameworks and acceleration libraries.


The Versal HBM series is built on the foundation of production-proven 7nm Versal devices. Developers can start prototyping on Versal Premium series devices and evaluation boards and readily migrate to the Versal HBM series. The Versal HBM series will begin sampling in the first half of 2022. Documentation is available now and tools will be available in the second half of 2021 via an early access program.

Visit our website for more information on Versal ACAP and the Versal HBM series. For more information on Xilinx and its breakthrough technologies, please visit

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About Xilinx

Xilinx, Inc. develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the cloud, to the edge, to the endpoint. Xilinx is the inventor of the FPGA and adaptive SoCs (including our Adaptive Compute Acceleration Platform, or ACAP), designed to deliver the most dynamic computing technology in the industry. We collaborate with our customers to create scalable, differentiated, and intelligent solutions that enable the adaptable, intelligent, and connected world of the future. For more information, visit

  1. Based on a typical system implementation of four DDR5-6400 components
  2. 3rd gen Intel Xeon gold/platinum scalable processors

Source: Xilinx Newsroom

Category: Product Announcements

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